In strained Si complementary metal oxide semiconductor (CMOS) applications, Si deposited on relaxed SiGe is tensily strained and used as channel material for both N-type field effect transistors (NFETs) and P-type field effect transistors (PFETs). The NFETs have significant mobility enhancement at strain of 0.6%; however, more than 1.2% of strain is required for significant PFET mobility enhancement. At the same time, similar to CMOS on Si on insulator (SOI) development, a thin Si/SiGe film on buried oxide (BOX) is very useful for high performance devices. In addition, stacking fault defects in the Si and SiGe material can cause source to drain shorts and need to be minimized.
As an example of the present state of the art, U.S. Patent Application Publication 2002/0185686 describes a process for fabricating a SGOI layer by growing a pseudomorphic epitaxial SiGe layer on top of SOI, implanting ions of light elements beneath the layer, and then performing a relaxation annealing process. U.S. Patent Application Publication 2002/0168802 describes a process for fabricating a combined SiGe/SOI structure, in which the top layer of SOI is converted to SiGe and then annealed.
One of the most promising methods to make SGOI wafers is thermal mixing. In thermal mixing, pseudomorphic SiGe film is deposited on SOI wafers, and a high temperature oxidation (1200° C.-1300° C.) intermixes SiGe with underlying Si, relaxes the SiGe, and makes the SiGe thinner at the same time. During the thermal mixing, Ge is rejected from the oxide at high temperatures, so the amount of Ge in SiGe layer is substantially conserved. For example, a 600 Å, 17% SiGe on SOI can be mixed to 400 Å, 25% SGOI, or to 1000 Å, 10% SGOI provided that initial SOI thickness is more than 400 Å.
However, SGOI film after thermal mixing is normally not 100% relaxed. In the above example, the 400 Å 25% SGOI is only 60% relaxed, which gives about 0.6% strain for Si deposited on this substrate. In order to have 1.2% strain, one will require 50% SiGe film if only 60% relaxation is achieved for SGOI. This high concentration SiGe film has many additional material issues and CMOS process integration issues compared with lower concentration materials, and is not desired. Thus, SiGe with relatively low concentration but high relaxation is required.